SATA vs. PATA - Two
Enclosure Management
Enclosure management has been a long-standing staple of SCSI and Fibre Channel but absent in Parallel ATA. The SES (SCSI enclosure services) and SAF-TE (SCSI-accessed fault-tolerant enclosures) protocols provide a mechanism for administrators to manage the status of enclosures and their constituent components such as power supplies, drives, door locks, fans and temperature sensors. This is invaluable in the implementation and management of fault tolerant storage subsystems where critical components operating below their nominal states need to be quickly identified and repaired (or replaced). The administrator can generally define the periodicity with which an enclosure is to be polled, and the storage enclosure processor (SEP) makes suitable notifications. Serial ATA provides enclosure management using SAF-TE and SES, enhancing its viability as an interconnect protocol to large, reliable, external RAID subsystems.
Command Queuing and Reordering
Command queuing allows multiple requests to be issued concurrently to one or more devices on a bus and permits those devices to reorder those requests prior to their execution to reduce latency and enhance throughput. This feature was introduced to Parallel ATA and SCSI by the ATM ATAPI-4 and SCSI-2 specifications respectively. While this feature is ubiquitous in SCSI, economic constraints have limited its proliferation in the ATA space. Parallel ATA devices are cost-sensitive, and command queuing comes at a price. Manufacturers have to incur the cost of developing firmware and integrating larger memory modules to their devices to implement this feature. Secondly, ATA is largely confined to the desktop space without emphasis on performance.
Decreased Operating Voltage
Processor cores are migrating towards lower voltages for several reasons. A lower voltage allows faster signal ramping that is crucial to enhancing speed and reducing heat dissipation on the processor. High-end processors typically have core voltages below 2V. However, to remain interoperable with other chips on the system's motherboard, they generally employ a split-rail architecture with an external input voltage of 3.3V. At the time this document was written, the most current ATA/ATAPI-6 standard specified a DC supply voltage of 3.3V for parallel ATA drivers and receivers for modes greater than 4. However, the signaling for all parallel ATA standards prior to ATA/ATAPI-6 were based on a 5V supply. Hence, to ensure compatibility with solutions that are based on standards preceding ATA/ATAPI-6, modern processors have to be 5V tolerant. However, the difficulty in achieving backward compatibility increases as processors progressively evolve with lower operating voltages. SATA solves this problem by specifying a peak-to-peak operating voltage of 500mV. SATA is clearly designed for interoperability with current and future processors.
Legacy Support
An attractive feature of SATA conducive to its adoption is its compatibility with existing Parallel ATA software. Any operating system or application that supports a given set of Parallel ATA devices can support any device in that set available with a SATA interface. Another feature is its interoperability with legacy Parallel ATA drives, achieved either by the use of integrated chipsets with co-existing parallel and serial ATA channels or the use of dongles.
Proliferation
SATA is being adopted by all major Parallel ATA device vendors (though the adoption by optical drive vendors is slower than anticipated.) Hence, the choice of devices available to users of SATA will be fairly extensive, and the cost of such devices is expected to be no higher than Parallel ATA.
Point-to-point vs. Bus Architecture
An advantage of SATA's point-to-point architecture over bus architectures (such as SCSI) is that a unique cable provides connectivity to each drive. A cable failure to a SATA-bases array is equivalent to a drive failure that can be tolerated by the use of suitable RAID. In contrast, the failure of a multi-target bus to an array that does not support as many drive failures as there are drives on the failed cable is catastrophic.
SATA vs. PATA - One
Enclosure management has been a long-standing staple of SCSI and Fibre Channel but absent in Parallel ATA. The SES (SCSI enclosure services) and SAF-TE (SCSI-accessed fault-tolerant enclosures) protocols provide a mechanism for administrators to manage the status of enclosures and their constituent components such as power supplies, drives, door locks, fans and temperature sensors. This is invaluable in the implementation and management of fault tolerant storage subsystems where critical components operating below their nominal states need to be quickly identified and repaired (or replaced). The administrator can generally define the periodicity with which an enclosure is to be polled, and the storage enclosure processor (SEP) makes suitable notifications. Serial ATA provides enclosure management using SAF-TE and SES, enhancing its viability as an interconnect protocol to large, reliable, external RAID subsystems.
Command Queuing and Reordering
Command queuing allows multiple requests to be issued concurrently to one or more devices on a bus and permits those devices to reorder those requests prior to their execution to reduce latency and enhance throughput. This feature was introduced to Parallel ATA and SCSI by the ATM ATAPI-4 and SCSI-2 specifications respectively. While this feature is ubiquitous in SCSI, economic constraints have limited its proliferation in the ATA space. Parallel ATA devices are cost-sensitive, and command queuing comes at a price. Manufacturers have to incur the cost of developing firmware and integrating larger memory modules to their devices to implement this feature. Secondly, ATA is largely confined to the desktop space without emphasis on performance.
Decreased Operating Voltage
Processor cores are migrating towards lower voltages for several reasons. A lower voltage allows faster signal ramping that is crucial to enhancing speed and reducing heat dissipation on the processor. High-end processors typically have core voltages below 2V. However, to remain interoperable with other chips on the system's motherboard, they generally employ a split-rail architecture with an external input voltage of 3.3V. At the time this document was written, the most current ATA/ATAPI-6 standard specified a DC supply voltage of 3.3V for parallel ATA drivers and receivers for modes greater than 4. However, the signaling for all parallel ATA standards prior to ATA/ATAPI-6 were based on a 5V supply. Hence, to ensure compatibility with solutions that are based on standards preceding ATA/ATAPI-6, modern processors have to be 5V tolerant. However, the difficulty in achieving backward compatibility increases as processors progressively evolve with lower operating voltages. SATA solves this problem by specifying a peak-to-peak operating voltage of 500mV. SATA is clearly designed for interoperability with current and future processors.
Legacy Support
An attractive feature of SATA conducive to its adoption is its compatibility with existing Parallel ATA software. Any operating system or application that supports a given set of Parallel ATA devices can support any device in that set available with a SATA interface. Another feature is its interoperability with legacy Parallel ATA drives, achieved either by the use of integrated chipsets with co-existing parallel and serial ATA channels or the use of dongles.
Proliferation
SATA is being adopted by all major Parallel ATA device vendors (though the adoption by optical drive vendors is slower than anticipated.) Hence, the choice of devices available to users of SATA will be fairly extensive, and the cost of such devices is expected to be no higher than Parallel ATA.
Point-to-point vs. Bus Architecture
An advantage of SATA's point-to-point architecture over bus architectures (such as SCSI) is that a unique cable provides connectivity to each drive. A cable failure to a SATA-bases array is equivalent to a drive failure that can be tolerated by the use of suitable RAID. In contrast, the failure of a multi-target bus to an array that does not support as many drive failures as there are drives on the failed cable is catastrophic.
SATA vs. PATA - One
